Can gears that engage only so good make the machine run?

Abstract: This conference «fringe» presentation explains an implementation which reads from a MEMS microphone and writes to a headset DAC. To avoid using an external PLL chip, clock output pulses rather unusually vary some in time. The timing of these «staccato» pulses is taken from a software table with 10 ns tick resolution (100 MHz). The pattern thus generated repeats exactly every 62.5 µs, giving a stereo frame rate of 16,000 Hz. The table contains 128 elements; two edges per pulse * 32 bits * two channels, each representing the number of ticks to the next clock signal edge output. The presentation shows that this controlled unevenness correctly picks up the data bits from the microphone chip or delivers the data bits to the headset chip. A processor from XMOS (UK) is used for this.

This fringe presentation will be published after the IEEE COPA 2025 conference.

EasyChair

This conference uses EasyChair for publishing (here). Also for fringe presentations. History:

1. 25Mar2025 ver1 uploaded
2. 27Mar2025 ver2 uploaded

Acknowledgement

Thanks to Henrik Austad for valuable feedback on ver1.