From the sources for IceCore by myStorm. Referred in My IceCore notes (Building the code with make).

Sitting in Terminal at directory /Users/teig/IceCore/Examples/blink/. I have just modified blink.v in some way, like adding a comment. The result is that these files are updated: blink.blif and chip.bin

Build of original blink.v

mymachine:blink teig$ make
yosys -q -p "synth_ice40 -blif chip.blif" chip.v blink.v
arachne-pnr -d 8k -P tq144:4k -p blink.pcf chip.blif -o chip.txt
seed: 1
device: 8k
read_chipdb +/share/arachne-pnr/chipdb-8k.bin...
  supported packages: bg121, bg121:4k, cb132, cb132:4k, cm121, cm121:4k, cm225, cm225:4k, cm81, cm81:4k, ct256, tq144:4k
read_blif chip.blif...
prune...
read_pcf blink.pcf...
instantiate_io...
pack...

After packing:
IOs          5 / 107
GBs          0 / 8
  GB_IOs     0 / 8
LCs          27 / 7680
  DFF        3
  CARRY      2
  CARRY, DFF 22
  DFF PASS   0
  CARRY PASS 1
BRAMs        0 / 32
WARMBOOTs    0 / 1
PLLs         0 / 2

place_constraints...
promote_globals...
  promoted clk$2, 25 / 25
  promoted 1 nets
    1 clk
  1 globals
    1 clk
realize_constants...
  realized 1
place...
  initial wire length = 218
  at iteration #50: temp = 14.3454, wire length = 65
  at iteration #100: temp = 5.9815, wire length = 54
  at iteration #150: temp = 1.83845, wire length = 41
  at iteration #200: temp = 0.009645, wire length = 23
  final wire length = 23

After placement:
PIOs       4 / 107
PLBs       6 / 960
BRAMs      0 / 32

  place time 0.02s
route...
  pass 1, 0 shared.

After routing:
span_4     6 / 29696
span_12    0 / 5632

  route time 0.02s
write_txt chip.txt...
icepack chip.txt chip.bin
mymachine:blink teig$

Diff of two logs

Another build uses an counted array of 26 instead of 24 bits and thus blinks 4 times slower. The 26 bits build is on the right side:

Fig.1 – Diff (press to see more pixels)

Now, the only thing that’s left is to learn what all these names and figures mean and imply!